INES Mapper 177
iNES Mapper 177 is used for games from 恒格电子 (Hénggé Diànzǐ). It’s basically oversize BNROM without bus conflicts, with an additional mirroring control, and with 8-32 KiB of battery-backed WRAM at CPU $6000-$7FFF. Submapper 1 defines a variant used by the Nikita PC Vivaz educational computer cartridge, in which bit 5 gains an alternative function. Some cartridges also have a TMS5220-compatibel LPC speech chip at CPU $5000-$5FFF.
7 bit 0
---------
$8000-FFFF: WWMP PPPP
|||+-++++- Select 32 KiB PRG-ROM bank at CPU $8000-$FFFF
||+------- Submapper 0: Select nametable mirroring
|| 0: Vertical
|| 1: Horizontal
|| Submapper 1: Enable 16 KiB CHR-RAM mode
++-------- Select 8 KiB PRG-RAM bank at CPU $6000-$7FFF
- Some Hengedianzi games use hard-wired mirroring and do not set the M bit correctly; they are set to INES Mapper 241 instead.
- NES 2.0 Mapper 329 was originally defined as mapper 177 with more than 8 KiB of PRG-RAM, but this is redundant, as specifying only 8 KiB of PRG-RAM in the NES 2.0 header will effectively render the WW bits nonfunctional.
- In 16 KiB CHR-RAM mode, PPU $0000-$0FFF is automatically switched between four 4 KiB CHR-RAM banks based on PPU A8-A9 during nametable accesses, while PPU $1000-$1FFF is always mapped to the last 4 KiB CHR-RAM bank.
One educational computer cartridge (英语发声词霸 - ABC 声霸) additionally mounts a TMS5220C-data-compatible LPC speech chip. The bitstream data is in the TMS5220C-PE LPC format and is sent four bits at a time. Refer to the TMS5220 data sheet, U.S. Patents 4,209,844, 4,331,836 and 4,335,277 as well as MAME’s source code for details on the LPC data format and LPC decoding. Note that the hardware interface is different from that of a regular TMS5220.
D~[R... ....]
+--------- 1=Ready to receive data
D~[.R.R DDDD]
| | ++++-- LPC data
+-+------- Both set: normal operation
Both clear: reset chip