INES Mapper 016

iNES Mapper 016 is used for some of the Bandai FCG boards, namely, boards with the FCG-1 ASIC that supports no EEPROM, and the LZ93D50 ASIC with no or 256 bytes of EEPROM.

• CPU $8000-$BFFF: 16 KiB switchable PRG ROM bank
• CPU $C000-$FFFF: 16 KiB PRG ROM bank, fixed to the last bank
• PPU $0000-$03FF: 1 KiB switchable CHR ROM bank
• PPU $0400-$07FF: 1 KiB switchable CHR ROM bank
• PPU $0800-$0BFF: 1 KiB switchable CHR ROM bank
• PPU $0C00-$0FFF: 1 KiB switchable CHR ROM bank
• PPU $1000-$13FF: 1 KiB switchable CHR ROM bank
• PPU $1400-$17FF: 1 KiB switchable CHR ROM bank
• PPU $1800-$1BFF: 1 KiB switchable CHR ROM bank
• PPU $1C00-$1FFF: 1 KiB switchable CHR ROM bank

Mask: $E000

7  bit  0
---- ----
xxxE xxxx
|||| ||||
+++|-++++- Open bus
   +------ Data out from I²C EEPROM

Mask: $E00F (Submapper 4), $800F (Submapper 5)

7  bit  0
---- ----
CCCC CCCC
|||| ||||
++++-++++-- 1 KiB CHR-ROM bank number

• $xxx0: Select 1 KiB CHR-ROM bank at PPU $0000-$03FF
• $xxx1: Select 1 KiB CHR-ROM bank at PPU $0400-$07FF
• $xxx2: Select 1 KiB CHR-ROM bank at PPU $0800-$0BFF
• $xxx3: Select 1 KiB CHR-ROM bank at PPU $0C00-$0FFF
• $xxx4: Select 1 KiB CHR-ROM bank at PPU $1000-$13FF
• $xxx5: Select 1 KiB CHR-ROM bank at PPU $1400-$17FF
• $xxx6: Select 1 KiB CHR-ROM bank at PPU $1800-$1BFF
• $xxx7: Select 1 KiB CHR-ROM bank at PPU $1C00-$1FFF

Mask: $E00F (Submapper 4), $800F (Submapper 5)

7  bit  0
---- ----
.... PPPP
     ||||
     ++++-- Select 16 KiB PRG-ROM bank at CPU $8000-$BFFF   

Mask: $E00F (Submapper 4), $800F (Submapper 5)

7  bit  0
---- ----
.... ..MM
       ||
       ++-- Select nametable mirroring type
             0: Vertical
             1: Horizontal
             2: One-screen, page 0
             3: One-screen, page 1

Mask: $E00F (Submapper 4), $800F (Submapper 5)

7  bit  0
---- ----
.... ...C
        |
        +-- IRQ counter control
             0: Counting disabled
             1: Counting enabled

• Writing to this register acknowledges a pending IRQ.
• On the LZ93D50 (Submapper 5), writing to this register also copies the latch to the actual counter.
• If a write to this register enables counting while the counter is holding a value of zero, an IRQ is generated immediately.

Mask: $E00F (Submapper 4), $800F (Submapper 5)

   $C         $B
7  bit  0  7  bit  0
---- ----  ---- ----
CCCC CCCC  CCCC CCCC
|||| ||||  |||| ||||
++++-++++--++++-++++-- Counter value (little-endian)

• If counting is enabled, the counter decreases on every M2 cycle. When it holds a value of zero, an IRQ is generated.
• On the FCG-1/2 (Submapper 4), writing to these two registers directly modifies the counter itself; all such games therefore disable counting before changing the counter value.
• On the LZ93D50 (Submapper 5), these registers instead modify a latch that will only be copied to the actual counter when register $800A is written to.

Mask: $800F

7  bit  0
---- ----
RDC. ....
|||
||+-------- I²C SCL
|+--------- I²C SDA
+---------- Direction bit (1=Enable Read)

• This register only exists on the LZ93D50 (Submapper 5), and only has an effect if a 24C02 EEPROM is present.
• Please refer to generic I²C tutorials and the 24C02 datasheet on how to operate or emulate this register correctly.

• INES Mapper 153 replaces the serial EEPROM with 8 KiB of battery-backed WRAM, and uses CHR-RAM instead of CHR-ROM.
• INES Mapper 157 adds a barcode reader, support for a second EEPROM, and uses CHR-RAM instead of CHR-ROM.
• INES Mapper 159 replaces the 256 byte with an 128 byte serial EEPROM.

A discrete logic clone of the FCG-2 has been found and reverse-engineered by Krzysiobal

Edit this page on GitHub