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FDS RAM adaptor cable pinout

This article is pending updates to verify the pin functions (based on documentation for other devices using QD drives) and the FDS register mappings.

The FDS RAM adapter requires a cable to be connected to the disk drive (physical or emulated) in order to facilitate disk transfers.

Diagram

Open-end view of the RAM adapter’s disk drive connector.

 ████████████████████████████████
 ████████████████████████████████
 ███  1   3   5   7   9   11  ███
 ███                          ███
 ███  2   4   6   8   10  12  ███
 \██████████████████████████████/
  \████████████████████████████/

Pin meanings

pin #2C33 register*2C33 pin*RAM pinsI/Osignal description
1$4025.2505 (green)Output/write gate (TODO: active low or high?)
2-6412 (cyan)OutputVCC (+5VDC)
3$4025.1487 (violet)Output/motor on
4-321 (brown)OutputVEE (ground)
5$4024[1]523 (orange)Output/write data (TODO: active low or high?)
6$4033.73711 (pink)Inputbusy
7$4032.2478 (grey)Inputwrite protect (TODO: active low or high?)
8---Inputmotor VCC†
9$4031[1]514 (yellow)Inputread data
10$4032.04510 (black)Input/media set
11$4032.1469 (white)Input/ready
12$4025.0496 (blue)Output/reset
notes on symbols
----------------
I/O: input/output
/ : Indicates a signal which is active on a low (0) condition.
* : These are corresponding pinouts for the 2C33 I/O chip, and the other  end  
of the RAM adaptor cable, which both are located inside the RAM adaptor.
† : The RAM adaptor does not use this signal (there is no wire in the cable 
to carry the signal). An electronically controlled 5-volt power supply 
inside the disk drive unit generates the power that appears here. This power 
is also shared with the drive's internal electric motor. Therefore, the 
motor only comes on when there is voltage on this pin.

Signal Descriptions

Pin 1 (Output) /write gate ($4025.2)

While active, this signal indicates that data appearing on the “/write data” pin is to be written to the storage media.

Pin 3 (Output) /motor on ($4025.1)

This signal controls the drive motor by default.

TODO: If “/write gate” is active, $4025.D0 ("/reset"?) seems to forcefully stop the motor and disable the write logic.

Pin 5 (Output) /write data

This is the serial data the RAM adaptor issues to be written to the storage media on the “/write gate” condition.

Pin 6 (Input) busy ($4033.7)

After the RAM adaptor issues a “/motor on” signal, the BIOS will check the status of this input to see if the disk drive motor has turned on. If this input is found to be inactive, the BIOS interprets this as the disk drive’s batteries having failed. Essentially, this signal’s operation is identical to the above mentioned “motor VCC” signal, except that this is a TTL signal version of it.

TODO: This signal may be controlling the drive LED as well?

Pin 7 (Input) write protect ($4032.2)

When active, this signal indicates to the RAM adaptor that the current media is write protected.

Pin 9 (Input) read data

When “/motor on” is active, data that is progressively read off the storage media is expected to appear here.

Pin 10 (Input) /media set ($4032.0)

Also called “/media sw (switch)”. When active, this signal indicates the presence of storage media.

Pin 11 (Input) /ready ($4032.1)

The falling edge of this signal would indicate to the RAM adaptor that the disk drive has acknowledged the “/motor on” signal, and the disk drive head is currently at the beginning of the disk (most outer track). While this signal remains active, this indicates that the disk head is advancing across the disk’s surface, and appropriate data can be transferred to/from the disk. This signal would then go inactive if the head advances to the end of the disk (most inner track), or if the “/motor on” signal becomes inactive.

Pin 12 (Output) /reset ($4025.0)

While active, this instructs the storage media pointer to be reset (and stay reset) at the beginning of the media. When inactive, the media pointer is to be advanced at a constant rate, and data progressively transferred to/from the media (via the media pointer).

TODO: The “/reset” logic specified in devices like the Yamaha MDF1 seems simpler than this “media pointer” nonsense. It probably just stops the motor, blocks the write logic, and makes “/ready” go inactive.

Notes

  1. ↑ 1.0 1.1 Parallel/serial conversion is done via a pair of shift registers inside 2C33

References

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