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Cycle reference chart

Clock rates

The clock rate of various components in the NES differs between consoles in the USA and Europe due to the different television standards used (NTSC M vs. PAL B). The color encoding method used by the NES (see NTSC video) requires that the master clock frequency be six times that of the color subcarrier, but this frequency is about 24% higher on PAL than on NTSC. In addition, PAL has more scanlines per field and fewer fields per second than NTSC. Furthermore, the PAL CPU’s master clock could have been divided by 15 to preserve the ratio between CPU and PPU speeds, but Nintendo chose to keep the Johnson counter structure, which always has an even period, and divide by 16 instead.

So the main differences between the NTSC and PAL PPUs are depicted in the following table:

PropertyNTSC (2C02)PAL (2C07)"Dendy" PAL FamicloneRGB (2C03/4/5)Brazil FamicloneArgentina Famiclone
Master clock speed21.477272 MHz ± 40 Hz
236.25 MHz ÷ 11 by definition
26.601712 MHz ± 50 Hz
26.6017125 MHz by definition
Like PALLike NTSC21.453671 MHz
3.067875 GHz ÷ 143 by definition
21.492338 MHz
42.984675 MHz ÷ 2 by definition
CPURicoh 2A03Ricoh 2A07UMC UA6527PRicoh 2A03UMC UA6527
CPU clock speed21.47~ MHz ÷ 12 = 1.789773 MHz26.60~ MHz ÷ 16 = 1.662607 MHz26.60~ MHz ÷ 15 = 1.773448 MHzLike NTSC21.45~ MHz ÷ 12 = 1.787806 MHz21.49~ MHz ÷ 12 = 1.791028 MHz
APU Frame Counter rate60.00 Hz50.00 Hz[1]59.46 Hz[2]Like NTSC59.94 Hz60.04 Hz
PPURicoh 2C02Ricoh 2C07UMC UA6538Ricoh 2C03, 2C04, 2C05UMC UA6548UMC UA6528P
Master clocks per PPU dot45544
PPU dots per CPU cycle33.2Like NTSC
CPU cycles per scanline341 × 4÷12 = 1132⁄3341 × 5÷16 = 1069⁄16341 × 5÷15 = 1132⁄3Like NTSC
Height of picture240 scanlines239 scanlinesLike PALLike NTSCthought to be like NTSCthought to be like PAL
Nominal visible picture height (see Overscan)224 scanlines268 scanlinesLike PALLike NTSCLike NTSCLike PAL
"Post-render" blanking lines between end of picture and NMI1 scanline1 scanline51 scanlines1 scanline1 scanline51 scanlines
Length of vertical blanking after NMI20 scanlines (≈ 2273 CPU cycles)70 scanlines (≈ 7459 CPU cycles)Like NTSC
Time during which OAM can be writtenVertical or forced blankingOnly during first 24 scanlines after NMI (≈2557 CPU cycles)Like NTSCLike NTSC
"Pre-render" lines between vertical blanking and next picture1 scanline
Total number of dots per frame341 × 261 + 340.5 = 89341.5
(pre-render line is one dot shorter in every odd frame)
341 × 312 = 106392Like PAL341 × 262 = 89342unknown
either like NTSC or RGB
Like PAL
Total number of CPU cycles per frame89341.5 ÷ 3 = 29780.5106392 ÷ 3.2 = 33247.5106392 ÷ 3 = 3546489342 ÷ 3 = 297802⁄3unknown
either like NTSC or RGB
Like PAL famiclone
Frame rate (vertical scan rate)60.0988 Hz50.0070 HzLike PAL60.0985 Hz60.03 Hz50.5027 Hz
Color of top borderAlways black ($0E)
Side and bottom bordersPalette entry at $3F00Always black ($0E), intruding on left and right 2 pixels and top 1 pixel of pictureLike PAL[3]Like NTSC[4]UnknownUnknown, probably like PAL
Color emphasis
(with correlating bit in PPUMASK)
Blue (D7), green (D6), red (D5)Blue (D7), red (D6), green (D5)Like PALBlue, green, red (full scale)Unknown
Other quirksEarly revisions cannot read back sprite or palette memoryManypoorly-researched

Some frequencies in the above table are rounded.

The 2C03, 2C04, and 2C05 PPUs were all found in Nintendo’s Vs. System and PlayChoice-10 (a.k.a. PC10 or PC-10) arcade systems. Famicom Titler, Famicom TVs, and RGB-modded NES consoles would use either the 2C03 or a 2C05 with glue logic to unswap $2000 and $2001. (Later RGB mods used a 2C02 in output mode and faked out all palette logic.)

The color emphasis bits on the PAL NES have their red and green bits in PPUMASK swapped

The authentic NES sold in Brazil is an NTSC NES with an adapter board to turn the NTSC video into PAL-M video, a variant of PAL using NTSC frequencies but PAL’s color modulation.

Micro Genius is a clone of the Famicom, manufactured by TXC Corporation of Taiwan and sold under various brand names in the 50 Hz market.[5] Among the best known brands is Dendy, distributed in Russia by Steepler, and the attention given by Russian reverse engineers to this clone has led to “Dendy” becoming a common name for all PAL Micro Genius-type famiclones. Its chipset (UA6527P+UA6538) is designed for compatibility with Famicom games, including games with CPU cycle counting mappers (e.g. VRC4) and games that use a cycle-timed NMI handler (e.g. Balloon Fight). This explains the faster CPU divider and longer post-render period vs. the authentic PAL NES.

To compensate for these differences, you can detect the TV system at power-on.

CPU cycle counts

To make things easier for those programming on the NES, the below chart provides the number of CPU cycles that a particular PPU-oriented trait takes.

PropertyNTSCPALDendy
Scanline (341 pixels)1132⁄31069⁄161132⁄3
HBlank (85 pixels)281⁄3269⁄16281⁄3
NMI to start of rendering22731⁄374593⁄822731⁄3
Frame29780.5*33247.535464
PPU dots ÷ CPU cycles33.23
OAM DMA513 (+1 if starting on CPU get cycles)

* NTSC frame timing is 29780.5 cycles if rendering is enabled during the 20th scanline; 297802⁄3 otherwise.

See also

References

  1. ↑ nesdev forum post by thefox: http://forums.nesdev.org/viewtopic.php?p=160349#p160349
  2. ↑ nesdev forum post by Eugene.S: http://forums.nesdev.org/viewtopic.php?p=174970#p174970
  3. ↑ nesdev forum post by Eugene.S: https://forums.nesdev.org/viewtopic.php?p=173764#p173764
  4. ↑ nesdev forum post by lidnariq: https://forums.nesdev.org/viewtopic.php?p=179705#p179705
  5. ↑ Post by feos at TASVideos and NESdev

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