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Comparison of Nintendo mappers

This article compares the capabilities of several Nintendo mappers.

Discrete logic

All of Nintendo’s discrete logic mappers have bus conflicts except some revisions of 7.

iNESChipsBoardsMax PRGPRG banksMax CHRCHR banksMirroringPRG RAM?IRQ
00-1NROM328V/H hardwiredJapan onlyNone
22UNROM, UOROM25616 + 16F8V/H hardwiredNoNone
31CNROM32328V/H hardwiredNoNone
71-2AxROM2563281NoNone
133CPROM (U)32164 + 4FV/H hardwiredNoNone
341BNROM256328V/H hardwiredNoNone
661GNROM, MHROM12832328V/H hardwiredNoNone
942UN1ROM25616 + 16F8V/H hardwiredNoNone
1802UNROM+74'0825616F + 168V/H hardwiredNoNone

ASIC

None of these ASIC mappers has bus conflicts.

iNESMapperBoardsMax PRG ROMPRG ROM banksMax CHRCHR banksMirroringPRG RAM?Assist
1MMC1SGROM, SNROM, SUROM51216 + 16F; 3284 + 4V/H/1 switchableOptionalNone
1MMC1SKROM, SLROM25616 + 16F; 321284 + 4V/H/1 switchableOptionalNone
4MMC3TxROM5128 + 8 + 16F2562 + 2 + 1 + 1 + 1 + 1V/H switchableOptionalScanline IRQ
4MMC3TGROM, TNROM5128 + 8 + 16F82 + 2 + 1 + 1 + 1 + 1V/H switchableJapan onlyScanline IRQ
118MMC3TKSROM, TLSROM5128 + 8 + 16F1282 + 2 + 1 + 1 + 1 + 1Any switchableOptionalScanline IRQ
119MMC3TQROM1288 + 8 + 16F64 + 82 + 2 + 1 + 1 + 1 + 1V/H switchableNoScanline IRQ
4MMC6HKROM5128 + 8 + 16F2562 + 2 + 1 + 1 + 1 + 1V/H switchable1KiB built-in; US and Europe onlyScanline IRQ
5MMC5ExROM102432, 16 + 16, 16 + 8 + 8, 8 + 8 + 8 + 81024BG: 4, 2 + 2, or 1 + 1 + 1 + 1
Sprites: 8, 4 + 4, 2 * 4, or 1 * 8
Split window: 4
Any1 KiB built in; more optionalScanline IRQ
Smaller attribute areas
Separate CHR bank per background tile
Separate sets of CHR banks for sprites
Vertical split screen
8x8 multiplier
9MMC2PNROM1288 + 24F1284/4 + 4/4V/H switchableNoTile triggered CHR bank switching
10MMC4FJROM, FKROM (J)25616 + 16F1284/4 + 4/4V/H switchableYesTile triggered CHR bank switching
  • Mapper wizard: Web-based decision tree for choosing a mapper for your NES project

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